Zolatron 6502 homebrew computer – a few tweaks

Within a couple of hours of posting the schematic for the main board of my Zolatron 6502 homebrew computer the doubts had already started to set in.

I made the mistake of visiting Grant Searle’s site. I’m already familiar with his work having built one of his projects (an FPGA-based CP/M computer), and so I know he’s forgotten more than I will ever know about electronics and computer design. And, of course, he’d done things slightly differently. I have to assume that where he and I differ, he’s right.

So I made a few tweaks to my design. I could have gone back and edited the last post, but I want to treat this blog as a form of journal where I work through the problems.

So here we are again. And this is the schematic as it now stands (click on the image to enlarge):

The first thing I did was add some pull-up resistors to some of the 6502’s input signals. Some of these are routed to the backplane connector for use elsewhere, but it’s best not to leave them floating. I figured 10kΩ resistors should provide a suitably weak pull-up.

Perusing Searle’s schematic it occurred to me that reading from the ROM didn’t involve the clock at all in my design. It would probably be better if it did. And I had a spare NAND gate in the 74HC00 that could achieve this. So, in the end, the design uses all four NANDs in the chip – as Searle’s does – but I’ve gone about it in a slightly different way.

I’m taking the RWB signal from the 6502 (which is high when reading, low when writing) and feeding that along with the phase 2 clock into the fourth NAND gate. When both are high, the output – which I’ve labelled READ_ENABLE – will be low. In all other instances, that signal will be high.

And I’m feeding READ_ENABLE to the output enable (/OE) pins of both the RAM and ROM. That way, reads will only work when the clock is high. (I’ve already ensured writes to RAM happen only when the clock is high by controlling the /CE pin – see the previous post for details.)

think these are worthwhile improvements. And once more I believe I have the main board finished. But give it a couple of hours and I’ll probably change my mind again…

If you can see any issues with this design, please do let me know.

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